The present invention relates to a semiconductor integrated circuit device and a method for manufacturing the same, and in particular, a technology effectively applicable to a semiconductor integrated circuit device having a system-on-chip structure in which a DRAM (Dynamic Random Access Memory) and a logic integrated circuit are mixedly mounted on a chip.
In recent years, in a high technology field such as multimedia, information communication and the like, a movement has become active to speed up a data transfer rate, to save a space (to increase a packaging density), and to reduce a power consumption by realizing a system-on-chip structure in which a microcomputer, a DRAM, an ASIC, and the like are mixedly mounted on one chip.
One of means for speeding up a logic integrated circuit part is a technology of forming a suicide layer over the surfaces of a source and a drain. However, if the silicide layer is formed over the source and drain of a memory cell selective MISFET of a memory cell of the DRAM, a leak current increases and deteriorates a refresh property.
In the case of mounting a DRAM and a logic integrated circuit on one chip while keeping the performance of the DRAM and the performance of the logic integrated circuit, it is necessary to develop a new mixed-mounting process suitable for the one chip structure.
It is an object of the present invention to provide a technology realizing one chip of a DRAM and a logic integrated circuit while keeping the performance of the DRAM and the performance of the logic integrated circuit, in a semiconductor integrated circuit device having a system-on-chip structure in which a DRAM and a logic integrated circuit are mixedly mounted on one chip.
The above-mentioned object and other objects, and new features of the present invention will become clear from the following description of the present specification and the accompanying drawings.